工作经历

格罗方得 | Globalfoundries

时间:2017.11-2018.05 | Time:2017.11-2018.05

格罗方得

Globalfoundries


验证 | Verification

描述:

基于ARM处理器的SOC验证;比特币挖矿机芯片验证。

Decription:

ARM CPU based SOC verification; Bitcoin mining machine chip verification.

清华大学 | Tsinghua University

时间:2016.04-2017.11 | Time:2016.04-2017.11

清华大学

Tsinghua University


与英特尔公司合作的处理器项目

CPU Project with Intel

描述:

在清华大学和英特尔公司合作的服务器处理器可重构计算项目中担任验证相关工作,包括项目环境搭建和具体的验证工作。

Decription:

Doing the verification related work in Tsinghua University, in the reconfigurable computing server CPU project cooperated by Tsinghua and Intel, including the verification environment building and the specific verification tasks.

展讯通信 | SpreadTrum Ltd.

时间:2015.06-2016.04 | Time:2015.06-2016.04

展讯通信有限公司

SpreadTrum Ltd.


ARMv8处理器

ARMv8 Based CPU

描述:

在一个基于ARM的处理器核项目中,担任芯片验证方面的工作。

Decription:

Based in a ARM core related project, being responsible for verification work.

希格玛微电子 | SigmaMicro Ltd.

时间:2012.12-2015.06 | Time:2012.12-2015.06

北京希格玛和芯微电子技术有限公司

Beijing SigmaMicro Ltd.


反向提取,整理OTP,扫描链压缩等

Counter Extraction, analyze OTP module and Compress Scan-Chain etc.

描述:

学习反向提取软件Hierux Designer, 提取整理项目296的数字部分,然后提取OTP模块,并分析整理OTP模块。研究并运用扫描链压缩,在TetraMax中在不损失覆盖率的前提下压缩扫描链向量数量。

Decription:

Learned the tool called Hierux Designer for counter extraction, extracted the digital part in Project 206, then extracted the OTP module and analyzed and arranged it. Studied and applied the Scan-Chain Compression, reduced the number of vectors in TetraMax without coverage loss.


SG8K26, SG8RF2402模块设计,验证,DFT,测试

MODULES DESIGN, SIMULATE, DFT, TEST IN SG8K26 and SG8RF2402

描述:

在SG8K26项目中,设计UART, PCA, DMA, CC, Port_Mux等模块,并辅以KEIL环境使用C语言验证,完成DFT相关工作。在SG8RF2402项目中,设计Timer等模块,验证SPI, WDT等模块,并测试。完成其DFT的工作。在其他多个项目中,测试鼠标画线,感应器等。

Decription:

Designed modules such as UART, PCA, DMA, CC, Port_Mux etc., Simulated them using C in KEIL environment, completed the DFT related work. Designed modules such as Timer, Simulated modules such as SPI, WDT and tested them. Completed DFT for it. In other multiple projects, tested line-drawing of mouse and sensors etc.


NCX使用和SG32XXX项目预研以及测试

NCX usage and pre research for SG32XXX and testing

描述:

研究使用NCX转换现有工艺库。在SG32XXX项目中,利用Synopsys IP库,Vera,Coretools等软件工具,搭建整体系统和验证环境,生成需要的I2C, UART, Timer等模块。修改FPGA平台,对SGMT028T2, SGMT08T3进行ADC测试,LDO测试,光电性能测试和鼠标照相测试。使用FPGA建立测试平台,测试SG89111T2芯片的成品芯片测试。

Decription:

Researched to transfer technics library using NCX, In SG32XXX, built the system and simulation environment, generated I2C, UART, Timer etc. modules using Synopsys IP Library,Vera,Coretools etc. Modified the FPGA platform, tested the ADC, LDO, photo-electricity performance and mouse-photography of SGMT028T2, SGMT028T3. Built the testing bench using FPGA, tested the finished product of the SG89111T2 chip.


验证与功能描述

Simulation and function description

描述:

参与多个项目的RTL数字仿真验证及使用汇编语言进行的整体验证,混合仿真以及模拟模块的RTL功能描述如BCD350GE, L24C64, SG8K2212, SG8LP283等。使用C语言编写名为Format_Trans的Console程序。目的是为了在测试过程中,更加快速的使用逻辑分析仪抓去鼠标芯片的图像数据,针对不同的逻辑分析仪,不同的矩阵格式,不同的芯片直接转换生成图像数据,并且内部转换为图像矩阵数据。

Decription:

Participated in digital simulation in RTL level and chip level simulation using ASM language, Mix signal simulation and wrote RTL codes for function description for analog modules in multiple projects such as BCD350GE, L24C64, SG8K2212, SG8LP283 etc. Wrote a program called Format_Trans using C language. The object was to enhance the speed that capturing picture data of te mouse chip using logic analyzer during testing process. It could directly transform the generated picture data and transform it to matrix from inside for different logic analyzers, different matrix forms and different chips.

北京君正 | Beijing Ingenic

时间:2012.10-2012.12 | Time:2012.10-2012.12

北京君正集成电路股份有限公司

Beijing Ingenic Semiconductor Co., Ltd.


高速乘法器的设计 | Design a high-speed multiplier

描述:

在一个MIPS CPU的项目中,完成了一个高速乘法器的前端设计,优化算法,达到速度面积的要求。

Decription:

In a project of MIPS CPU, Designed a high-speed multiplier in RTL, optimized the algorithm, achieved the requirement of speed and area.